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forum - #coders |
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 | | Topic: | 68k assembler causes head to itch | | | Hello there everyone.
I've been working at m68k assembler on and off since about friday now, so that I could make an emulator to run my pdp-8 code ever since my pdp-8 broke down.
Here's the pdp-8 test program that I'm trying to run in octal.
1007 tad 0007 add 0007 to accumulator
3406 dca i 0006 deposit to (0006) and clear accumulator
2006 isz 0006 increment 0006 and skip if zero
5000 jmp 0000 loop by jumping to 0000
7402 hlt halt processor.
0000
0010 first adress to be written to
5252 fill pattern.
now here's my "emulator".
* pppp d pppp 888 / ee mm mm
* p p d p p 8 8 / e e m m m
* pppp dddd pppp 888 / eee m m m
* p d d p 8 8 / e m m m
* p dddd p 888 / eee m m m
*
* by s a m. f r. j u l. 2 0. 2 0 0 7.
* version zero. attempts to run pdp-8 code.
memloc0 dc.w $0207 * tad 0007
memloc1 dc.w $0706 * dca i 0006
memloc2 dc.w $0406 * isz 0006
memloc3 dc.w $0a00 * jmp 0000
memloc4 dc.w $0F02 * hlt
memloc5 dc.w $0000
memloc6 dc.w $0008 * starting adress
memloc7 dc.w $0aaa * fill pattern
START org $1000
OPFETCH move.w (a0)+,d0 put current opcode into d0.
move d0,d2 time to calculate what adress is being reffed to
andi.w #$FF,d2
asl #$1,d2 make sure we've got an even adress.
bclr #$8,d2 zero page?
beq DIRECTION yup. that's what we have now, so see if we want indirection.
move a0,d3 otherwise, get page from upper 5 bits of PC.
ori.w #$FF80,d3
or.w d3,d2
DIRECTION btst #$9,d0 now, are we dealing with indirect adressing?
beq INDIRECT yes, so do it.
move d2,a1 otherwise, put address into appropriate register
jmp OPPARSE and see what's next to go down inda hood.
INDIRECT move.w d2,a2
move.w (a2),a1 use a2 as scratchpad for loading effective adress into adress register
OPPARSE asr #$8,d0 get rid of everything but the command.
asr #$1,d0 we have everything we need.
cmpi #$0,d0
beq ANDOP
cmpi #$1,d0
beq TADOP
cmpi #$2,d0
beq ISZOP
cmpi #$3,d0
beq DCAOP
cmpi #$4,d0
beq JMSOP
cmpi #$5,d0
beq JMPOP
cmpi #$6,d0
beq IOTOP
cmpi #$7,d0
beq OPROP
ANDOP move (a1),d2 AND - self explanatory
and d2,d1
jmp INTER
TADOP add (a1),d1 TAD - add operand to accumulator
jmp INTER
ISZOP move.w (a1),d2 ISZ - increment operand by 1. Skip next instruction if it overflows to 0
addq.w #$1,d2
andi.w #$0fff,d2
bne NOSKIP
addq #$2,a0
NOSKIP andi.w #$f000,(a1) rightmost twelve bits will always be 0 in this case
or.w d2,(a1)
jmp INTER
DCAOP move.w d1,(a1) DCA - deposit and clear accumulator
move.w #$0,d1
jmp INTER
JMSOP move a0,(a1)+ JMS - store PC at word
move a1,a0 and continue execution from the following word
addq #$2,a0 execute next command after that.
jmp OPFETCH in this case, don't allow an interrupt to be dealt with till next round
JMPOP move.w a1,a0 JMP - jump
jmp INTER
IOTOP addq #$2,a0
jmp INTER IOT - input output transfers.
OPROP addq #$2,a0 OPR - operations.
jmp INTER
INTER nop deal with interrupts. fill this in later
jmp opfetch
MOVE.B #9,D0
TRAP #15 Halt Simulator
END START
The first few instructions seem to run fine, but a mistake in the routine for handling indirect adressing causes the third to cock up. Can someone see what's wrong here? | | |
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